4. Electrical computers and digital processing systems: multicomput
  5. Computer-to-computer direct memory accessing

Ryszard Bleszynski

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CBR/VBR traffic scheduler

Multiplex communications – Data flow congestion prevention or control – Control of data admission to the network
Reexamination Certificate

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Memory management system and algorithm for network processor...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate

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Multi-protocol conversion assistance method and system for a...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate

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Systems and methods for implementing ABR with guaranteed MCR

Multiplex communications – Data flow congestion prevention or control – Control of data admission to the network
Reexamination Certificate

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Systems and methods for on-chip storage of virtual...

Electrical computers and digital processing systems: multicomput – Computer-to-computer direct memory accessing
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Profile ID: LFUS-PAI-P-2140706

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