4. Electrical computers and digital processing systems: memory
  5. Storage accessing and control
  6. Hierarchical memories

Roger Roisen

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Apparatus and method for addressing a cache memory in a computer

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Dynamic logic element having non-invasive scan chain insertion

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Profile ID: LFUS-PAI-P-1520553

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