4. Semiconductor device manufacturing: process
  5. Chemical etching
  6. Combined with coating step

Phillip G. Wald

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6F2 architecture ROM embedded DRAM

Static information storage and retrieval – Read only systems
Reexamination Certificate

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Amorphous silicon interconnect with multiple silicon layers

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Patent

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Capacitors and DRAM arrays

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate

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DRAM with bias sensing

Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate

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DRAM with bias sensing

Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-321574

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