4. Static information storage and retrieval
  5. Read/write circuit
  6. Bad bit

Peter Joel Jenkins

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High performance redundancy in an integrated memory system

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Method and architecture to prevent corrupt data propagation...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Self-timed driver circuit

Electronic digital logic circuitry – Interface – Current driving
Patent

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Profile ID: LFUS-PAI-P-543719

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