4. Coded data generation or conversion
  5. Digital code to digital code converters
  6. Parallel to serial

Peter F. Corbett

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Bit-sliced digit-serial multiplier

Boots – shoes – and leggings
Patent

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Cell stack for variable digit width serial architecture

Boots – shoes – and leggings
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Concentrated parity technique for handling double failures...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate

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Concentrated parity technique for handling double failures...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate

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Concentrated parity technique for handling double failures...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Profile ID: LFUS-PAI-P-208760

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