Cell stack for variable digit width serial architecture

Details Cell stack for variable digit width serial architecture Cell stack for variable digit width serial architecture

1988-04-18

1990-08-21

Shaw, Gareth D.

Boots, shoes, and leggings

364488, G06F 100, G06F 750

Patent

active

049512218

ABSTRACT:
A design methodology for digit serial architecture, especially for use in digital signal processing circuitry, includes a cell stack configuration incorporating a variable number of individual operation cells in conjunction with cap and control cells to provide power, control and timing signals. The arrangement employed permits the construction of cell libraries for silicon compilers from a small number of individual components and permits such compilers to generate chip fabrication masks for a plurality of fixed, but initially arbitrary digit size circuit designs.

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Serial Data Computation, S. G. Smith & P. B. Denyer, copyright 1988, Kluwer Academic Publishers, Boston MA, pp. 140-149.

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