Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Inventor
active
EEPROM memory cell with increased dielectric integrity
Method of making EEPROM cell structure
Narrow isolation oxide process
No associations
LandOfFree
Pervez H. Sagarwala does not yet have a rating. At this time, there are no reviews or comments for this inventor.
If you have personal experience with Pervez H. Sagarwala, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pervez H. Sagarwala will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-P-1857370