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Paul Gerard Villarrubia

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Clustering techniques for faster and better placement of...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Integrated placement and synthesis for timing closure of micropr

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
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Latch placement technique for reduced clock signal skew

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Method and apparatus for applying fine-grained transforms...

Data processing: structural design – modeling – simulation – and em – Modeling by mathematical expression
Reexamination Certificate

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Method and apparatus for diffusion based cell placement...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Profile ID: LFUS-PAI-P-765054

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