4. Electrical computers and digital processing systems: memory
  5. Storage accessing and control
  6. Shared memory area

Niteen Patkar

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Method and apparatus for interfacing a processor with a bus

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate

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Method and apparatus for out of order memory processing...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate

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Method and apparatus for providing probe based bus locking...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate

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Method and apparatus of configurable processing

Electrical computers and digital processing systems: processing – Processing architecture – Superscalar
Reexamination Certificate

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Method of manufacture and apparatus of an integrated...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
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Profile ID: LFUS-PAI-P-2436495

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