4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Memory testing

Mike Pearson

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Method and apparatus for memory array compressed data testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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System for evaluating and reporting semiconductor test processes

Data processing: measuring – calibrating – or testing – Testing system – Including specific communication means
Patent

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System for evaluating and reporting semiconductor test...

Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Quality evaluation
Reexamination Certificate

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Profile ID: LFUS-PAI-P-1247164

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