4. Computer-aided design and analysis of circuits and semiconductor
  5. Nanotechnology related integrated circuit design

Michael A. Minter

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System for performing automatic test pin assignment for a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Timing constraint generator

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2992907

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