4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Error/fault detection technique

Mark Owen Homewood

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Cache memory system with multiple ports cache memories...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Circuit and method for instruction compression and dispersal...

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Circuit and method for supporting misaligned accesses in the...

Electrical computers and digital processing systems: processing – Processing control – Processing control for data transfer
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Cyclic redundancy check in a computer system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Instruction fetch apparatus for wide issue processors and...

Electrical computers and digital processing systems: processing – Instruction fetching – Of multiple instructions simultaneously
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Profile ID: LFUS-PAI-P-2122347

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