4. Electronic digital logic circuitry
  5. Clocking or synchronizing of logic stages or gates

Mark A. Anders

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Adder circuit with sense-amplifier multiplexer front-end

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate

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Adder circuit with sense-amplifier multiplexer front-end

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate

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Apparatus and method for an address generation circuit

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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Apparatus and method for an address generation circuit

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
Reexamination Certificate

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Clock receiver circuit for on-die salphasic clocking

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating
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Profile ID: LFUS-PAI-P-2108726

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