4. Static information storage and retrieval
  5. Format or disposition of elements

Leffert Jay & Polglaze PA

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Adjustable timing circuit of an integrated circuit

Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate

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Adjustable timing circuit of an integrated circuit by...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Architecture, package orientation and assembly of memory...

Static information storage and retrieval – Format or disposition of elements
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Array architecture for depletion mode ferroelectric memory...

Static information storage and retrieval – Systems using particular element – Ferroelectric
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Boosted substrate/tub programming for flash memories

Static information storage and retrieval – Floating gate – Particular biasing
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Profile ID: LFUS-PAI-P-2621123

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