Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2005-12-20
2005-12-20
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185270, C365S185280, C365S185290, C365S203000
Reexamination Certificate
active
06977842
ABSTRACT:
A boosted substrate tub/substrate floating gate memory cell programming process is described that applies a voltage to the substrate or substrate “tub” of a NAND Flash memory array to precharge a channel of carriers within the floating gate memory cells prior to applying a high gate programming voltage to the gate of the selected floating gate memory cells and coupling a program or program-inhibit voltage to program the selected floating gate memory cell(s) as desired. The use of a boosted tub programming approach avoids the requirement that the bitline and/or source line circuit design of the NAND Flash array be able to withstand or carry high voltages during programming of a floating gate memory cells and allows reuse of the block erase high voltage circuits connected to the substrate tub. This allows the NAND Flash memory array to be designed with smaller circuit designs and/or smaller circuit feature elements.
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Dinh Son T.
Leffert Jay & Polglaze PA
Micro)n Technology, Inc.
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