4. Static information storage and retrieval
  5. Format or disposition of elements

Keisuke Horita

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Critical path estimating program, estimating apparatus,...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Hierarchical routing method to be implemented in a layout system

Static information storage and retrieval – Format or disposition of elements
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Logic-synthesis method and logic synthesizer

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Profile ID: LFUS-PAI-P-1660983

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