Hierarchical routing method to be implemented in a layout system

Details Hierarchical routing method to be implemented in a layout system Hierarchical routing method to be implemented in a layout system

1997-09-29

1999-05-18

Nelms, David

Static information storage and retrieval

Format or disposition of elements

364491, G11C5/02

Patent

active

059056690

ABSTRACT:
A hierarchical routing method is implemented in a layout system for a semiconductor integrated circuit which has a repetitive circuit portion. The hierarchical routing method lays out circuit elements for the repetitive circuit portion with the repetitive circuit portion structured hierarchically, expands the layout for the hierarchically-structured repetitive circuit portion in a separate independent database, extracts information of connections from the expanded layout for the repetitive circuit portion, and then carries out routing. Therefore, a semiconductor integrated circuit having a repetitive circuit portion can be designed in a short period of time while excellent properties are ensured for the semiconductor integrated circuit.

REFERENCES:
patent: 5493510 (1996-02-01), Shikata
patent: 5745374 (1998-04-01), Matsumoto

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