4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Memory testing

Jun-bae Kim

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Method and system for testing semiconductor memory device...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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On-die termination latency clock control circuit and method...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

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Wideband delay-locked loop (DLL) circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-3256855

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