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Joseph H. Hassoun

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Delay lock loop with clock phase shifter

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate

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Delay lock loop with clock phase shifter

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate

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Double data rate flip-flop

Pulse or digital communications – Synchronizers
Reexamination Certificate

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Double data rate flip-flop

Electronic digital logic circuitry – Multifunctional or programmable – Sequential or with flip-flop
Reexamination Certificate

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Double data rate flip-flop

Electronic digital logic circuitry – Multifunctional or programmable – Array
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Profile ID: LFUS-PAI-P-957302

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