Pulse or digital communications – Synchronizers
Reexamination Certificate
2008-01-08
2008-01-08
Tran, Khanh C. (Department: 2611)
Pulse or digital communications
Synchronizers
C326S041000
Reexamination Certificate
active
07317773
ABSTRACT:
Method and apparatus for doubling the throughput rate of data transmission on a logic path comprising providing two latches that alternately receive successive bits of the data stream to be transmitted and a multiplexer having data transmission paths that are alternately clocked by two separate clocks, which clocks are substantially 180 degrees out of phase.
REFERENCES:
patent: 5016226 (1991-05-01), Hiwada et al.
patent: 5844844 (1998-12-01), Bauer et al.
patent: 6020760 (2000-02-01), Sample et al.
patent: 6060928 (2000-05-01), Jun et al.
patent: 6104726 (2000-08-01), Yip et al.
patent: 6472904 (2002-10-01), Andrews et al.
patent: 6477110 (2002-11-01), Yoo et al.
patent: 6686769 (2004-02-01), Nguyen et al.
patent: 6777980 (2004-08-01), Young et al.
patent: 7061941 (2006-06-01), Zheng
patent: 0 312 259 (1989-04-01), None
patent: 2 339 502 (2000-01-01), None
U.S. Appl. No. 09/684,540, filed Oct. 6, 2000, Young et al.
Carberry Richard A.
Hassoun Joseph H.
Menon Suresh M.
Sodha Ketan
Young Steven P.
Cartier Lois D.
Tran Khanh C.
Xilinx , Inc.
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