4. Multiplex communications
  5. Fault recovery
  6. Bypass an inoperative channel

John E. Jenne

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Adaptive calibration technique for high speed memory devices

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate

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Apparatus, method and system for using cache memory as...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate

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Buffer to buffer credit flow control for computer network

Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data transfer regulating
Reexamination Certificate

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Computer system with adaptive heartbeat

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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CPU power sequence for large multiprocessor systems

Electrical computers and digital processing systems: support – Computer power control – Power sequencing
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Profile ID: LFUS-PAI-P-2421228

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