4. Static information storage and retrieval
  5. Systems using particular element
  6. Flip-flop

Jaya Prakash Samala

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Boundary scan cell design for high performance I/O cells

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Dynamic flop with power down mode

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit
Reexamination Certificate

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Dynamic flop with power down mode

Static information storage and retrieval – Systems using particular element – Flip-flop
Reexamination Certificate

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Error checking and correcting for content addressable...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Method for operating a boundary scan cell design for high...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2039141

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