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James W. Conary

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Apparatus for operating a microprocessor core and bus controller

Patent

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Detecting states of signals

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Counting – scheduling – or event timing
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Integrated circuit having a core which operates at a speed great

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Memory array leakage reduction circuit and method

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate

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Memory array leakage reduction circuit and method

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
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Profile ID: LFUS-PAI-P-431504

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