Apparatus for operating a microprocessor core and bus controller

Details Apparatus for operating a microprocessor core and bus controller Apparatus for operating a microprocessor core and bus controller

1993-03-25

1997-05-27

Barry, Lance Leonard

G06F 108

Patent

active

056341172

ABSTRACT:
A microprocessor that operates at the speed of the the bus or at a speed which is a multiple of the bus speed on a selectable basis. The microprocessor includes a phase locked loop to generate clock signals for operations within the microprocessor and bus clock signals for data transfer operations on the bus. The present invention allows a microprocessor core to operate at the same frequency or twice the frequency of the address/data buses.

REFERENCES:
patent: 3623017 (1971-11-01), Lowell
patent: 3715729 (1973-02-01), Mercy
patent: 3895311 (1975-07-01), Basse et al.
patent: 3919695 (1975-11-01), Gooding
patent: 3931585 (1976-01-01), Barker et al.
patent: 3936762 (1976-02-01), Cox, Jr. et al.
patent: 4077016 (1978-02-01), Sanders et al.
patent: 4095267 (1978-06-01), Morimoto
patent: 4203153 (1980-05-01), Boyd
patent: 4264863 (1981-04-01), Kojima
patent: 4293927 (1981-10-01), Hoshii
patent: 4300019 (1981-11-01), Toyomaki
patent: 4365290 (1982-12-01), Nelms et al.
patent: 4405898 (1983-09-01), Flemming
patent: 4479191 (1984-10-01), Nojima et al.
patent: 4615005 (1986-09-01), Maejima et al.
patent: 4639864 (1987-01-01), Katzman et al.
patent: 4667289 (1987-05-01), Yoshida et al.
patent: 4669099 (1987-05-01), Zinn
patent: 4698748 (1987-10-01), Juzswik et al.
patent: 4758945 (1988-07-01), Remedi
patent: 4766567 (1988-08-01), Kato
patent: 4780843 (1988-10-01), Tietjen
patent: 4814591 (1989-03-01), Nara et al.
patent: 4823292 (1989-04-01), Hillion
patent: 4841440 (1989-06-01), Yonezu et al.
patent: 4881205 (1989-11-01), Aihara
patent: 4896260 (1990-01-01), Hyatt
patent: 4907183 (1990-03-01), Tanaka
patent: 4922450 (1990-05-01), Rose et al.
patent: 4935863 (1990-06-01), Calvas et al.
patent: 4979097 (1990-12-01), Triolo et al.
patent: 4980836 (1990-12-01), Carter et al.
patent: 4991129 (1991-02-01), Swartz
patent: 5021679 (1991-06-01), Fairbanks et al.
patent: 5025387 (1991-06-01), Frane
patent: 5059924 (1991-10-01), JenningsCheck
patent: 5077686 (1991-12-01), Rubinstein
patent: 5083266 (1992-01-01), Watanabe
patent: 5103114 (1992-04-01), Fitch
patent: 5123107 (1992-06-01), Mensch, Jr.
patent: 5129091 (1992-07-01), Yorimoto et al.
patent: 5133064 (1992-07-01), Hotta et al.
patent: 5151992 (1992-09-01), Nagae
patent: 5167024 (1992-11-01), Smith et al.
patent: 5175845 (1992-12-01), Little
patent: 5210858 (1993-05-01), Jensen et al.
patent: 5220672 (1993-06-01), Nakao et al.
patent: 5239652 (1993-08-01), Seibert et al.
patent: 5249298 (1993-09-01), Bolan et al.
patent: 5251320 (1993-10-01), Kuzawinski et al.
patent: 5305452 (1994-04-01), Khan et al.
patent: 5319771 (1994-06-01), Takeda
patent: 5325516 (1994-06-01), Blomgren et al.
patent: 5336939 (1994-08-01), Eitrheim et al.
patent: 5359232 (1994-10-01), Eitrheim et al.
patent: 5537581 (1996-07-01), Conary et al.
Motorola, MC68020 32-Bit Microprocessor User's Manual, pp. 1-3, (3d ed. 1990).
IBM Technical Disclosure Bulletin, vol. 33, No. 6B, Nov. 1990, New York, "Multiple Phase Clock Generation From a Single Oscillator", pp. 322-325.
Wescon/89 Conference Record, Nov. 14, 1989, San Francisco, CA, "The VL86C020 RISC with On-board Cache", pp. 251-254.
Case, Brian. "R4000 Extends R3000 Architecture with 64-Bit Capabilities." Microprocessor Report. vol.: v5 n19. Oct. 16, 1991.
Slater, Michael. "MIPS Previews 64-Bit R4000 Architecture." Microprocessor Report. vol.: v5 n2. Feb. 6, 1991; pp. p1(6).
Wilson, John. "MIPS Rethinks RISC With Superpipelining." Computer Design. vol. v30 n3. Feb. 1, 1991; pp. p28(3).
Intel Automotive Components Handbook "Power-On Reset", 1988, pp. 10-24 & 10-25.
Motorola MC6802032--Bit Microprocessor User's Manual, 3rd Edition, 1990, pp. 1-3.

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