4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Memory testing

Inapac Technology, Inc

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Multiple power levels for a chip within a multi-chip...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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System and methods for a high-speed dynamic data bus

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
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