Donald D. Parker

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Decoder for decoding multiple instructions in parallel

Boots – shoes – and leggings
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Decoder having a split queue system for processing intstructions

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Decoder having independently loaded micro-alias and macro-alias

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Decoding circuit and method providing immediate data for a micro

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Enhanced highly pipelined bus architecture

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate

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Profile ID: LFUS-PAI-P-405657

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