4. Electrical computers and digital processing systems: memory
  5. Storage accessing and control
  6. Hierarchical memories

David R. Cheriton

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Access control list processing in hardware

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate

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Access control list processing in hardware

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate

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Approximated per-flow rate limiting

Multiplex communications – Data flow congestion prevention or control – Flow control of data transmission through a network
Reexamination Certificate

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Approximated per-flow rate limiting

Multiplex communications – Data flow congestion prevention or control
Reexamination Certificate

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Cache memory containing extra status bits to indicate memory reg

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Profile ID: LFUS-PAI-P-169860

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