4. Electrical computers and digital processing systems: processing
  5. Instruction decoding
  6. Decoding instruction to accommodate variable length...

Dan R. Christen

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Basic block oriented trace cache utilizing a basic block...

Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate

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Compressing variable-length instruction prefix bytes

Electrical computers and digital processing systems: processing – Instruction decoding – Predecoding of instruction component
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Compression of surface normals in three-dimensional graphics...

Computer graphics processing and selective visual display system – Computer graphics processing – Three-dimension
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Efficient method for storing texture maps in multi-bank memory

Computer graphics processing and selective visual display system – Computer graphics display memory system – Texture memory
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Expanding instructions with variable-length operands to a...

Electrical computers and digital processing systems: processing – Instruction decoding – Predecoding of instruction component
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Profile ID: LFUS-PAI-P-2011383

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