4. Computer-aided design and analysis of circuits and semiconductor
  5. Nanotechnology related integrated circuit design

Craig R. Chafin

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Device and method for using a lessened load to measure...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction
Reexamination Certificate

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Hard macro having an antenna rule violation free...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Method and device for a scalable memory building block

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2724900

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