Method and device for a scalable memory building block

Static information storage and retrieval – Addressing – Plural blocks or banks

Reexamination Certificate

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Details

C365S230050, C365S230060

Reexamination Certificate

active

06963515

ABSTRACT:
The present invention is a method and system for providing a scalable memory building block device. The memory building block device includes a plurality of separate memory arrays, decode logic for selecting only one bit from the plurality of memory arrays, and output means for providing only one bit as an output of the memory building block device, such that the memory building block device generates as its output only one bit.

REFERENCES:
patent: 5953261 (1999-09-01), Furutani et al.
patent: 5973984 (1999-10-01), Nagaoka
patent: 6181626 (2001-01-01), Brown
patent: 6434074 (2002-08-01), Brown

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