Chakrapani Pathikonda

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Apparatus for generating bus clock signals with a 1/N characteri

Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Pulse multiplication or division
Patent

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Apparatus for generating bus clock signals with a 1/N characteri

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Patent

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Auto-configuration support for multiple processor-ready pair or

Data processing: generic control systems or specific application – Generic control system – apparatus or process – Plural processors
Patent

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Core clock correction in a 2/N mode clocking scheme

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Frequency or repetition rate conversion or control
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Core clock correction in a 2/N mode clocking scheme

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-449086

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