4. Static information storage and retrieval
  5. Read/write circuit
  6. Having particular data buffer or latch

Benjamin Louie

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Accessing test modes using command sequences

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Bitline exclusion in verification operation

Static information storage and retrieval – Read/write circuit – Signals
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Column/row redundancy architecture using latches programmed...

Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...
Reexamination Certificate

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Column/row redundancy architecture using latches programmed...

Static information storage and retrieval – Read/write circuit – Bad bit
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Contiguous block addressing scheme

Static information storage and retrieval – Floating gate – Particular connection
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Profile ID: LFUS-PAI-P-2084485

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