4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Azrul Halim

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Generation of margining voltage on-chip during testing CAM...

Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate

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Method of micro-architectural implementation of interface...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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On-chip repair of defective address of core flash memory cells

Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2566616

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