4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Memory testing

A. Papaliolios

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Integrated circuit test mode with externally forced reference vo

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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Integrated circuit test mode with externally forced...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-225129

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