Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Patent
1998-11-12
2000-12-26
Clark, Sheila V.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
257786, 257774, H01L 2348, H01L 2352, H01L 2940
Patent
active
061664413
ABSTRACT:
Briefly, in accordance with one embodiment of the invention a method of forming at least two vias, each having a metal overlap, to interconnect at least two connection points with metallization includes the following. The at least two vias are etched through a layer of insulating material. The at least two etched vias are located diagonally with respect to one another. Metal overlap for each of the at least two vias is formed into a polygon shape having more than four sides.
Briefly, in accordance with another embodiment of the invention, an article includes: a storage medium, the storage medium having stored thereon, instructions, which, when executed, result in: the placement and routing of vias between at least two connection points to be interconnected with metallization by positioning at least two vias diagonally with respect to one another, the at least two vias being positioned so each is capable of having a polygon shape of metal overlap with more than four sides.
Briefly, in accordance with still another embodiment of the invention, an integrated cicuit includes: a semiconductor substrate, the semiconductor substrate having formed thereon an interconnect. The interconnect including at least two vias, the at least two vias being located diagonally with respect to one another and each having a metal overlap with a polygon shape of more than four sides.
REFERENCES:
patent: 4196443 (1980-04-01), Dingwall
patent: 4951101 (1990-08-01), Alter et al.
patent: 5432381 (1995-07-01), Melzner
patent: 5508564 (1996-04-01), Lee et al.
Clark Sheila V.
Intel Corporation
Skaist Howard A.
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