Jitter equalizer for digital transmission filter

Pulse or digital communications – Repeaters – Testing

Patent

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Details

375118, 333 28R, H04B 304

Patent

active

050581309

ABSTRACT:
An equalizer for equalizing an input data signal of a digital transmission filter for jitter, overshoot and undershoot in amplitude includes a delay circuit which delays an input non-return-to-zero (NRZ) data signal a specified number of bits by synchronizing the input data signal with a basic clock signal, and outputs a plurality of delayed data bit streams each corresponding to a respective delay element of the delay circuit. The delayed data bit streams are input to a logic circuit which produces a plurality of voltage control signals corresponding to patterns of logic symbols in the data bit streams of the delayed input data signal, these voltage control signals designating information as to how much the delayed input data signal will be distorted due to data signals adjacent thereto upon passing through a digital transmission filter. The voltage control signals are input to a voltage generator coupled to the output of the logic circuit, and the voltage generator, under the control of a time control signal applied thereto, outputs a given level of adding or subtracting voltage in response to these voltage control signals. The delayed input data signal is converted from a unipolar data signal to a bipolar data signal, and an adder circuit adds the given amount of adding or subtracting voltage from the voltage generator to the bipolar data signal to compensate for the amount of signal distortion which occurs in the output waveform of the digital transmission filter due to the influence on the input data signal of the pulse tails of data signals adjacent thereto when the bipolar input data signal passes through the digital transmission filter.

REFERENCES:
patent: 3758863 (1973-09-01), Ungerboeck
patent: 4650930 (1987-03-01), Hogeboom et al.

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