Floating gate non-volatile memory cell with low erasing voltage

Details Floating gate non-volatile memory cell with low erasing voltage Floating gate non-volatile memory cell with low erasing voltage

1997-09-29

2000-04-25

Tran, Minh Loan

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257316, 257324, H01L 2976, H01L 29788, H01L 29792

Patent

active

060547316

ABSTRACT:
A non-volatile memory cell of the type which includes at least one floating gate transistor and which is realized over a semiconductor substrate includes a source region, and a drain region, separated by a channel region which is overlaid by a thin layer of gate oxide. The gate oxide isolates a floating gate region from the substrate. The floating gate region is coupled to a control gate terminal. The floating gate region of the memory cell develops a first potential barrier between the semiconductor substrate and the gate oxide layer, and a second different potential barrier between the floating gate region and the gate oxide.

REFERENCES:
patent: 5389808 (1995-02-01), Arai
patent: 5420845 (1995-05-01), Maeda et al.
patent: 5511020 (1996-04-01), Hu et al.
patent: 5596214 (1997-01-01), Endo
patent: 5640345 (1997-06-01), Okuda et al.
patent: 5670790 (1997-09-01), Katoh et al.
patent: 5801401 (1998-09-01), Forbes
patent: 5886368 (1999-03-01), Forbes et al.

Affiliated with

Also associated with

Rating

Floating gate non-volatile memory cell with low erasing voltage does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Floating gate non-volatile memory cell with low erasing voltage , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Floating gate non-volatile memory cell with low erasing voltage will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-995216