Stacked multi-chip modules and method of manufacturing

Details Stacked multi-chip modules and method of manufacturing Stacked multi-chip modules and method of manufacturing

1992-05-22

1995-06-06

Ledynh, Bot

Electricity: conductors and insulators

Boxes and housings

Hermetic sealed envelope type

174 522, 361790, 257686, 257700, 257777, 437208, H01L 2302

Patent

active

054224357

ABSTRACT:
A circuit assembly which includes a semiconductor die having substantially parallel opposing first and second surfaces and at least one electrical contact mounted on the first surface. A first element having substantially parallel opposing first and second surfaces and at least one electrical contact mounted on one of its surfaces is mounted on and at least partially supported at its second surface by the first surface of the semiconductor die. The first element is positioned such that the semiconductor die electrical contact is exposed. A fine wire conductor having first and second ends is connected at its first end to either the semiconductor die electrical contact or the first element electrical contact. A method of manufacturing this circuit assembly is also disclosed.

REFERENCES:
patent: 4320438 (1982-03-01), Ibrahim
patent: 4714952 (1987-12-01), Takekawa
patent: 5012323 (1991-04-01), Farnworth
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