Parallel-dichotomic serial sensing method for sensing multiple-l

Static information storage and retrieval – Floating gate – Multiple values

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3651852, 36518521, 36518907, 365210, G11C 700

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057294909

ABSTRACT:
A method for sensing multiple-levels non-volatile memory cells which can take one programming level among a plurality of m=2.sup.n (n>=Z) different programming levels, provides for biasing a memory cell to be sensed in a predetermined condition, so that the memory cell sinks a cell current with a value belonging to a discrete set of m distinct cell current values, each cell current value corresponding to one of said programming levels. The sensing method also provides for: simultaneously comparing the cell current with a prescribed number of reference currents having values comprised between a minimum value and a maximum value of said discrete set of m cell current values and dividing said discrete set of m cell current values in a plurality of sub-sets of cell current values, for determining the sub-set of cell current values to which the cell current belongs; repeating step (a) for the sub-set of cell current values to which the cell current belongs, until the sub-set of cell current values to which the cell current belongs comprises only one cell current value, which is the value of the current of the memory cell to be sensed.

REFERENCES:
patent: 4544917 (1985-10-01), Lenhoff, Jr.
patent: 4749984 (1988-06-01), Prost et al.
patent: 4964079 (1990-10-01), Devin
patent: 5019820 (1991-05-01), Matsuzawa et al.
patent: 5070332 (1991-12-01), Kaller et al.
patent: 5142495 (1992-08-01), Canepa
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5381374 (1995-01-01), Shiraishi et al.
patent: 5638322 (1997-06-01), Lacey
Bleiker, Christoph et al., "A Four-State EEPROM Using Floating-Gate Memory Cells," IEEE Journal of Solid-State Circuits, vol. SC-22, No. 3, Jun. 1987, pp. 460-463.
Horiguchi, Masashi et al, "An Experimental Large-Capacity Semiconductor File Memory Using 16-Levels/Cell Storage," IEEE Journal of Solid-State Circuits, vol. 23, No. 1, Feb. 1988, pp. 27-32.
Bauer, M., et al., "A Multilevel Cell 32MB Flash Memory," IEEE International Solid-State Circuits Conference, Feb. 16, 1995, pp. 119, 132-133, 351.

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