Method of manufacturing semiconductor device

Details Method of manufacturing semiconductor device Method of manufacturing semiconductor device

1997-09-05

2000-12-05

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438697, 438699, 438633, H01L 214763, H01L 21311

Patent

active

061566314

ABSTRACT:
In a patterning of a gate electrode by an optical lithography, a narrowing of a pattern and a change in sizes are prevented at a step of a polycrystalline silicon. A silicon nitride 17 is formed, as an impact-absorbing film, on a polycrystalline silicon 16 to be the gate electrode. The silicon nitride 17 is leveled by a chemical mechanical polishing method. A resist 18 is then applied. The optical lithography is performed. The resist 18 is used as a mask so that the polycrystalline silicon 16 is anisotropic etched to form a gate electrode.

REFERENCES:
patent: 5324689 (1994-06-01), Yoo
patent: 5324690 (1994-06-01), Gelatos et al.
patent: 5346587 (1994-09-01), Doan et al.
patent: 5543356 (1996-08-01), Horiuchi
patent: 5654227 (1997-08-01), Gonzalez et al.
patent: 5858865 (1999-01-01), Juengling et al.
English translation of Japanese Office Action dated Mar. 16, 1999 (Hei 11).
Japanese Office Action dated Oct. 6, 1998 with English language translation of Japanese Examiner'comments.

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