Semiconductor memory device using ferroelectric capacitor

Details Semiconductor memory device using ferroelectric capacitor Semiconductor memory device using ferroelectric capacitor

1997-06-26

1999-06-01

Nelms, David

Static information storage and retrieval

Systems using particular element

Ferroelectric

36518905, G11C 1122

Patent

active

059093897

ABSTRACT:
A semiconductor memory device has a plurality of memory cells arranged in a matrix format. Each memory cell includes a thin film capacitor with a ferroelectric film and a pair of electrodes opposing each other through the ferroelectric film, and a transfer gate MOS transistor arranged to be connected to the thin film capacitor. The operating voltage value corresponding to the central axis of the polarization hysteresis characteristic curve of the thin film capacitor shifts from 0V by Vf. When no write or read operation is performed for the memory cell, the transistor is turned on, and an adjustment voltage set to be from 0 to 2 Vf is constantly applied across the electrodes of the thin film capacitor.

REFERENCES:
patent: 5629888 (1997-05-01), Saito et al.
patent: 5668753 (1997-09-01), Koike
S. Aggarwal, et al. "Hysteresis Relaxation In (Pb, La)(Zr, Ti)O.sub.3 Thin Film Capacitors With (La, Sr)CoO.sub.3 Electrodes", Appl. Phys. Lett., vol. 69, No. 17, Oct. 1996, pp.2540-2542.
K. Abe, et al., Japan Ceramics Society, The 15.sup.th Electronics Seminar, Feb. 2, 1997, pp. 72-84, "Ferroelectricity of Pt/(Ba, Sr)Tio3/SrRuO3 Thin Films".
K. Abe, et al., Proceedings of the 14.sup.th Meeting on Ferroelectric Materials and Their Applications, May 28, 1997, pp. 153-154, "Asymmetric hysteresis and anomalous leakage current in heteroepitaxial BaTiO3 Films".

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