Spin-on conductor process for integrated circuits

Details Spin-on conductor process for integrated circuits Spin-on conductor process for integrated circuits

1995-10-23

1998-03-17

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438609, 438626, 438627, 438631, 438688, 438687, 438686, 438685, 427241, 427226, 427229, 4274191, 4274192, B05D 302, B05D 512, H01L 21445

Patent

active

057286264

ABSTRACT:
A method of planarizing a non-planar substrate, such as filling vias and contact holes, spreads a suspension of a conducting material suspended in a liquid on a substrate. The suspension includes an organometallic material, preferably with particles of a polymerized tin or indium alkoxide. The material is spread by spinning the substrate after applying the suspension. The carrier liquid and organic groups are removed by baking and curing at elevated temperatures, thereby depositing the conductive material on the substrate in a layer which is more planar than the substrate and which has regions of greater and lesser thickness. A relatively brief etch step removes conductive material from regions of lesser thickness, leaving material filling vias or contact holes.

REFERENCES:
patent: 3723178 (1973-03-01), Sohlbarand
patent: 3934336 (1976-01-01), Morse
patent: 4472458 (1984-09-01), Sirinyan et al.
patent: 4511601 (1985-04-01), Akse et al.
patent: 4539222 (1985-09-01), Anderson, Jr. et al.
patent: 4569876 (1986-02-01), Nakakita
patent: 4617237 (1986-10-01), Gupta et al.
patent: 4643913 (1987-02-01), Okunaka et al.
patent: 4770953 (1988-09-01), Horiguchi et al.
patent: 4776937 (1988-10-01), Gupta et al.
patent: 4795512 (1989-01-01), Nakatani et al.
patent: 4799958 (1989-01-01), Morris et al.
patent: 4810669 (1989-03-01), Kobayashi
patent: 4826709 (1989-05-01), Ryan et al.
patent: 4849252 (1989-07-01), Arfsten et al.
patent: 4888210 (1989-12-01), Isozaki et al.
patent: 4921731 (1990-05-01), Clark et al.
patent: 4943537 (1990-07-01), Harrington, III
patent: 4960618 (1990-10-01), Tanitsu et al.
patent: 4962082 (1990-10-01), Barboux et al.
patent: 4972251 (1990-11-01), Lehrer
patent: 4997482 (1991-03-01), Haluska et al.
patent: 5006508 (1991-04-01), Treacy et al.
patent: 5011568 (1991-04-01), Braymen et al.
patent: 5011725 (1991-04-01), Foster
patent: 5028455 (1991-07-01), Miller et al.
patent: 5052102 (1991-10-01), Fong et al.
patent: 5064685 (1991-11-01), Kestenbaum et al.
patent: 5084323 (1992-01-01), Nagasaka et al.
patent: 5096745 (1992-03-01), Anderson et al.
patent: 5112676 (1992-05-01), Lot et al.
patent: 5116643 (1992-05-01), Miller et al.
patent: 5137749 (1992-08-01), Yamazaki et al.
patent: 5183684 (1993-02-01), Carpenter
patent: 5196229 (1993-03-01), Chau
patent: 5202152 (1993-04-01), Giannelis et al.
patent: 5213999 (1993-05-01), Sparks et al.
patent: 5236874 (1993-08-01), Pintchovski
patent: 5256443 (1993-10-01), Tomita
patent: 5256565 (1993-10-01), Bernhardt et al.
patent: 5266358 (1993-11-01), Uemura et al.
patent: 5290354 (1994-03-01), Haluska
patent: 5290733 (1994-03-01), Hayasaka et al.
patent: 5304533 (1994-04-01), Kobayashi et al.
patent: 5320913 (1994-06-01), Morimoto et al.
patent: 5403616 (1995-04-01), Hattori et al.
patent: 5423285 (1995-06-01), Paz De Araujo et al.
patent: 5466629 (1995-11-01), Mihara et al.
patent: 5514822 (1996-05-01), Scott et al.
Grant & Hackh's Chemical Dictionary, 5th Ed. pp. 600-601, 1987.
Wolf, Stanley, Silicon Processing for the VLSI Era, vol. 2, pp. 128, 282-286, 1990.
Wolf, Stanley, Silicon Processing for the VLSI Era, vol. 2, (1990) pp. 181, 201.
IBM Technical Disclosure Bulletin; May 1973; vol. 15, No. 12, May 1973, pp. 3811-3812.

Affiliated with

Also associated with

Rating

Spin-on conductor process for integrated circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Spin-on conductor process for integrated circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Spin-on conductor process for integrated circuits will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-957248