Method of forming high density and low power flash memories with

Details Method of forming high density and low power flash memories with Method of forming high density and low power flash memories with

1999-06-18

2000-09-12

Nelms, David

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

257321, H01L 213205

Patent

active

061177563

ABSTRACT:
The method for forming flash memory includes the following steps. At first, a semiconductor substrate with an isolation region formed thereupon is provided. The semiconductor substrate has a pad oxide layer and a first nitride layer formed thereover. A portion of the first nitride layer and a portion of the pad oxide layer are removed to define a gate region. A first oxide layer is formed and then a sidewall structure is formed. The semiconductor substrate is doped with first type dopants. A first thermal process is performed to form a second oxide layer and to drive in the first type dopants. The sidewall structure and the first nitride layer are then removed, and a first conductive layer is then formed over the substrate. A doping process is performed to dope the pad oxide layer, the first oxide layer, and the second oxide layer by implanting second type dopants through the first conductive layer. A second thermal process is performed and a portion of the first conductive layer is removed to define a floating gate. A dielectric layer is formed over the semiconductor substrate and a second conductive layer is then formed thereover as a control gate.

REFERENCES:
patent: 5837585 (1998-11-01), Wu et al.
patent: 5861347 (1999-01-01), Maiti et al.
patent: 6008517 (1999-12-01), Wu

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