Method for patterning semiconductor

Details Method for patterning semiconductor Method for patterning semiconductor

1992-10-13

1993-10-26

Hearn, Brian E.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156656, 156657, 437228, H01L 2100

Patent

active

052562484

ABSTRACT:
A method for forming a fine pattern of a semiconductor element by using intermediate transcription layers. A layer to be transcribed is formed on a silicon substrate. A first intermediate transcription layer with a thickness of .delta. and a first mask layer are formed on the layer to be transcribed and are patterned to produce a line width of L and a line space of S, with S approximately equal L +2.delta.. A second intermediate transcription layer of the same material as the first intermediate transcription layer and with a thickness of .delta. is formed on the overall surface. A second mask layer with a substantially flattened surface is formed on the second intermediate transcription layer. The flattened second mask layer is etched back so as to expose a portion of the second intermediate transcription layer. A pattern is formed with the first and second intermediate transcription layers by partial isotropic etching of the intermediate transcription layers to produce a line width and line space of the intermediate transcription layers of approximately L/2 and S/2, respectively. The mask layers are removed, and an anisotropic dry etching of the layer to be transcribed is performed using the intermediate layers as a mask. The patterning is completed by removing the intermediate transcription layers.

REFERENCES:
patent: 4729967 (1988-03-01), Armiento
patent: 5026665 (1991-06-01), Zdebel
patent: 5037505 (1991-08-01), Tung
patent: 5079179 (1992-01-01), Josefowicz et al.

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