Fishing – trapping – and vermin destroying
Patent
1994-02-18
1994-12-27
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437217, 437220, 257666, H01L 2156, H01L 2160
Patent
active
053765885
ABSTRACT:
A thermally and electrically enhanced surface mount package with up to at least 600 I/O connections, but possessing the flexibility and simplicity of conventional leadframes. The package includes an integrated circuit die having a plurality of bonding pads, a conductive substrate having a cavity formed therein for receiving the integrated circuit die, and a flexible circuit laminated on the conductive substrate. The flexible circuit includes at least a wiring pattern and an area array of bumps formed on pads at the periphery of the flexible circuit. The flexible circuit may include a plurality of openings through the flexible circuit beneath certain of the pads or traces of the wiring pattern so as to ground the certain of the pads (ground pads) or traces to the conductive substrate. Preferably, the lamination of the flexible circuit to the conductive substrate would be performed using a conductive adhesive which substantially fills the openings to facilitate the concomitant electrical connection of the ground pads to the conductive substrate. The package is advantageous because it provides excellent thermal performance and controlled impedance signal transmission which are important in packages having a high number of I/O connections, yet it is relatively inexpensive to produce, has a generic finger layout like leadframes, and lends itself to surface mount assembly by conventional pick-and-place and mass fellow techniques. A method for making the package is also disclosed.
REFERENCES:
patent: 4881116 (1989-11-01), Hidada et al.
patent: 4949158 (1990-08-01), Ueda
patent: 5016084 (1991-05-01), Nakao
patent: 5045921 (1991-09-01), Lin et al.
patent: 5087530 (1992-02-01), Wada et al.
patent: 5120678 (1992-06-01), Moore et al.
patent: 5162975 (1992-11-01), Matta et al.
Chaudhuri Olik
Pham Long
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