Semiconductor memory device with improved cell arrangement

Details Semiconductor memory device with improved cell arrangement Semiconductor memory device with improved cell arrangement

1987-10-01

1989-08-08

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Differential sensing

365 51, G11C 702

Patent

active

048559563

ABSTRACT:
A semiconductor memory device having a plurality of memory cells of uniform and reliable characteristics is disclosed. The memory device comprises at least one array of memory cells arranged in matrix form of rows and columns and a selection circuit for accessing at least one of the memory cells, and is featured by a plurality of dummy cells arranged along all the peripheries of the array so as to surround the array.

REFERENCES:
patent: 4393474 (1983-07-01), McElroy

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