Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1997-04-17
1998-11-17
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Data refresh
365210, 365200, G11C 1300
Patent
active
058386238
ABSTRACT:
A method for detecting redunded defective addresses in a memory device with redundancy including at least one memory register for storing at least one defective address. The memory register includes a plurality of memory units each one storing a defective address bit and comparing the defective address bit with a respective current address bit supplied to the memory device; the memory register activates a respective redundancy selection signal when the current address coincides with the defective address stored therein. The method provides for: activating a forcing signal for forcing the activation of the redundancy selection signal to be independent of the coincindence of a first group of current address bits, associated to a respective first group of the memory units, with the defective address bits stored in the respective first group of memory units; scanning all the possible configurations of a second group of current address bits associated with a second group of the memory units and sequentially supplying the memory device with all the configurations; detecting a configuration of the second group of current address bits for which the redundancy selection signal is activated; while supplying the memory device with the configuration of the second group of current address bits, deactivating the forcing signal and sequentially supplying the memory device with a scanning of all the possible configurations of the first group of address bits; detecting a configuration of the first group of current address bits for which the redundancy selection signal is activated.
REFERENCES:
patent: 5381370 (1995-01-01), Lacey et al.
patent: 5579265 (1996-11-01), Devin
European Search Report from European Patent Application 96830216.6, filed Apr. 18, 1996.
Fears Terrell W.
SGS--Thomson Microelectronics S.r.l.
LandOfFree
Method for detecting redunded defective addresses in a memory de does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for detecting redunded defective addresses in a memory de, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for detecting redunded defective addresses in a memory de will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-891548