Memory controller with error logging

Details Memory controller with error logging Memory controller with error logging

1988-12-21

1990-10-16

Smith, Jerry

Excavating

371 216, 371 212, 371 51, G06F 1110

Patent

active

049641298

ABSTRACT:
In accordance with the present invention, there is provided a system for logging an error that occurred in a multi-chip memory storage device in a data processing system. The system has a mechanism for detecting an error and for receiving data and check bits associated therewith. The mechanism for detecting an error generates syndrome bits as a function of the data and of the check bits. Connected to the error detecting mechanism is an error logging mechanism which is adapted to receive the syndrome bits and to determine the chip in which the error occurred.

REFERENCES:
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patent: 4375664 (1983-03-01), Kim
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patent: 4523313 (1985-06-01), Nibby, Jr. et al.
patent: 4527251 (1985-07-01), Nibby, Jr. et al.
patent: 4532629 (1985-07-01), Furuya
patent: 4535455 (1985-08-01), Peterson
patent: 4584681 (1986-04-01), Singh
patent: 4809276 (1989-02-01), Lemay et al.

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