READ-WHILE-WRITE RAM CELL

Details READ-WHILE-WRITE RAM CELL READ-WHILE-WRITE RAM CELL

1989-08-11

1990-10-16

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Including signal clamping

365154, 365179, G11C 1300

Patent

active

049640810

ABSTRACT:
A READ-WHILE-WRITE current-mode logic RAM cell suitable for use in a RAM device having the ability to simultaneously write and read data.
The RAM cell contains a bit-cell consisting of flip-flop configured transistors differentially connected to a constant current source, a multiple-emitter transistor network tied to each bit-cell load resistor which prevents the bit-cell from saturating, separate READ and WRITE data lines, and READ and WRITE buffer transistors having READ and WRITE control lines.

REFERENCES:
patent: 4580244 (1986-04-01), Birrittella
patent: 4635087 (1987-01-01), Birrittella et al.
patent: 4656495 (1987-04-01), Birrittella
patent: 4697251 (1987-09-01), Birrittella et al.
patent: 4701882 (1987-10-01), Birrittella et al.
patent: 4701883 (1987-10-01), Wrathall et al.
patent: 4916667 (1990-04-01), Miyabayashi

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