Fishing – trapping – and vermin destroying
Patent
1991-03-20
1991-12-17
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 49, 437191, 437195, H01L 21265
Patent
active
050735136
ABSTRACT:
A nonvolatile semiconductor memory device is provided including a doped semiconductor substrate and three gate conductor layers electrically insulated from each other in the cell area on the substrate. A first floating gate conductor layer is formed on the substrate and covered by a second control gate conductor layer, forming a twofold polycrystalline silicon structure. A third select gate conductor layer is formed along one side wall of the twofold structure of the floating gate and control gate conductor layers, having a side wall spacer structure. The first conductor layer serves as a floating gate; the second conductor layer serves as a control gate; and the third conductor layer serves as a select gate. A field oxide layer is provided to separate cells from each other. The control and the select gates are connected in a region between cells through the field oxide layer. By providing the third conductor in the form of a side wall spacer, the cell area can be greatly reduced.
REFERENCES:
patent: 4462090 (1984-07-01), Iizuka
patent: 4794565 (1988-12-01), Wu et al.
patent: 4822750 (1989-04-01), Perlegos
Chaudhari C.
Hearn Brian E.
Samsung Electronics Co,. Ltd.
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